Integrated circuits are typically formed through a number of steps which include patterning and etching various features over a substrate. A necessary requirement imposed on the patterning and etching of substrate features is that such features be aligned relative to other features on the substrate. Failure to achieve adequate alignment can render a fabricated device inoperative.
One way of maintaining alignment during a fabrication process, which often involves forming multiple layers over a substrate and aligning each of the layers to one or more other layers, is to use so-called alignment or registration marks. Alignment or registration marks are typically provided over a scribe area of a wafer between individual die area. Alignment or registration marks can be provided on a substrate through utilization of a mask which contains not only alignment mark patterns, but also integrated circuitry patterns as well. One past practice has been to expose the entire mask, including the integrated circuitry patterns, to lithographic processing, and then inspect the transferred alignment patterns for alignment. If the alignment patterns were not desirably aligned, the alignment process was repeated by removing the patterned layer, re-applying and patterning it, and then inspecting for alignment. For example, a layer of photoresist will typically be formed over a substrate. A mask will be utilized to form a pattern over the photoresist, which photoresist is subsequently developed to provide alignment marks over the substrate, as well as integrated circuitry patterns. If the alignment marks are not desirably aligned, the photoresist is removed, reapplied (which can include time-consuming baking), reexposed, redeveloped and examined for misalignment again. Needless to say, removal, reapplication, reexposure, redevelopment, and reexamination of the photoresist takes precious production time and reduces throughput of the wafers.
This invention arose out of concerns associated with improving the methods through which integrated circuitry devices are formed, and in particular, with providing improved wafer alignment methods and tools.